lkml.org 
[lkml]   [2016]   [Mar]   [7]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH v5 13/26] memory: omap-gpmc: Support general purpose input for WAITPINs
On Mon, 7 Mar 2016 10:34:40 +0100
Boris Brezillon <boris.brezillon@free-electrons.com> wrote:

> Hi Roger,
>
> On Fri, 19 Feb 2016 23:15:35 +0200
> Roger Quadros <rogerq@ti.com> wrote:
>
> > OMAPs can have 2 to 4 WAITPINs that can be used as general purpose
> > input if not used for memory wait state insertion.
> >
> > The first user will be the OMAP NAND chip to get the NAND
> > read/busy status using gpiolib.
>
> Just a comment on this approach. Why do you need to exposed native R/B
> pins as GPIOs? I mean, other NAND controllers are supporting R/B
> detection using dedicated logic, and they do not exposed those pins a
> plain GPIOs. Have you considered adding another property (rb-native ?)

Just had a look at the sunxi-nand binding, and we chose "allwinner,rb"
for this native RB logic. So "ti,rb" would be the equivalent for the
gpmc driver.

--
Boris Brezillon, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

\
 
 \ /
  Last update: 2016-03-07 11:21    [W:0.981 / U:0.004 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site