Messages in this thread | | | Date | Tue, 18 Aug 2015 17:26:26 +0800 | Subject | Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. | From | Fu Wei <> |
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Hi
On 18 August 2015 at 16:31, Will Deacon <will.deacon@arm.com> wrote: > On Tue, Aug 18, 2015 at 12:19:13AM +0100, Zhang, Jonathan Zhixiong wrote: >> On 8/17/2015 3:01 AM, Will Deacon wrote: >> > On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote: >> >> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h >> >> index a17b623..ced6e25 100644 >> >> --- a/arch/arm64/include/asm/acpi.h >> >> +++ b/arch/arm64/include/asm/acpi.h >> >> @@ -22,6 +22,7 @@ >> >> #ifdef CONFIG_ACPI_APEI >> >> #include <linux/efi.h> >> >> #include <asm/pgtable.h> >> >> +#include <asm/tlbflush.h> >> >> #endif >> >> >> >> /* Macros for consistency checks of the GICC subtable of MADT */ >> >> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t; >> >> extern int acpi_disabled; >> >> extern int acpi_noirq; >> >> extern int acpi_pci_disabled; >> >> +#ifdef CONFIG_ACPI_APEI >> >> +extern int acpi_disable_cmcff; >> >> +#endif >> >> >> >> static inline void disable_acpi(void) >> >> { >> >> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void) >> >> static inline void arch_fix_phys_package_id(int num, u32 slot) { } >> >> void __init acpi_init_cpus(void); >> >> >> >> +#ifdef CONFIG_ACPI_APEI >> >> +static inline void arch_apei_flush_tlb_one(unsigned long addr) >> >> +{ >> >> + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); >> >> +} >> >> +#endif >> > >> > Looking at the callers of this function, I suspect we could downgrade it >> > to a local CPU invalidation if we wanted. However, this isn't a hot-path >> > so it's fine to stay like it is for now. >> I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be >> more efficient without side effect, since both ghes_ioremap_pfn_irq() >> and ghes_iounmap_irq() happen in same atomic context. However, today >> arch/arm64/include/asm/tlbflush.h does not have a function tailored for >> such performance optimization. Does it make sense to add a parameter to >> flush_tlb_kernel_range() to allow caller to make a choice? >> static inline void flush_tlb_kernel_range(unsigned long start, >> unsigned long end, bool local) >> There are only two others callers of flush_tlb_kernel_range(). > > I've already got some patches to add things like local_flush_tlb_all, > which I'll post after the merge window (I'm currently rewriting a bunch > of the switch_mm code to try to reduce the TLBI traffic).
If I understand correctly, these patches add new functions, instead of changing the existent one. I thinks this way is better.
If we have new patch for optimizing TLB flushing, we can make a new patchset for this in the future. Because this patch is only for enabling APEI on aarch64.
> > If this isn't a hotpath (I don't think it is), then it's probably not > worth making the optimisation without a system to benchmark it on.
agree.
But please let me know if you have any suggestion on this patch. is this patch OK for you?
> > Will
-- Best regards,
Fu Wei Software Engineer Red Hat Software (Beijing) Co.,Ltd.Shanghai Branch Ph: +86 21 61221326(direct) Ph: +86 186 2020 4684 (mobile) Room 1512, Regus One Corporate Avenue,Level 15, One Corporate Avenue,222 Hubin Road,Huangpu District, Shanghai,China 200021
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