Messages in this thread | | | Subject | Re: [PATCH] acpi, apei, arm64: APEI initial support for aarch64. | From | "Zhang, Jonathan Zhixiong" <> | Date | Mon, 17 Aug 2015 16:19:13 -0700 |
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On 8/17/2015 3:01 AM, Will Deacon wrote: > On Fri, Aug 14, 2015 at 01:35:53PM +0100, fu.wei@linaro.org wrote: >> From: Tomasz Nowicki <tomasz.nowicki@linaro.org> >> >> This commit provides APEI arch-specific bits for aarch64 >> >> Changelog: >> Fu Wei: >> Move arch_apei_flush_tlb_one() to arch/arm64/include/asm/apci.h. >> Delete arch/arm64/kernel/apei.c. >> Add "#ifdef CONFIG_ACPI_APEI" for "acpi_disable_cmcff". >> >> Signed-off-by: Tomasz Nowicki <tomasz.nowicki@linaro.org> >> Signed-off-by: Fu Wei <fu.wei@linaro.org> >> --- >> arch/arm64/Kconfig | 1 + >> arch/arm64/include/asm/acpi.h | 11 +++++++++++ >> arch/arm64/kernel/acpi.c | 4 ++++ >> 3 files changed, 16 insertions(+) >> >> diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig >> index 318175f..6144c9d 100644 >> --- a/arch/arm64/Kconfig >> +++ b/arch/arm64/Kconfig >> @@ -3,6 +3,7 @@ config ARM64 >> select ACPI_CCA_REQUIRED if ACPI >> select ACPI_GENERIC_GSI if ACPI >> select ACPI_REDUCED_HARDWARE_ONLY if ACPI >> + select HAVE_ACPI_APEI if ACPI >> select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE >> select ARCH_HAS_ELF_RANDOMIZE >> select ARCH_HAS_GCOV_PROFILE_ALL >> diff --git a/arch/arm64/include/asm/acpi.h b/arch/arm64/include/asm/acpi.h >> index a17b623..ced6e25 100644 >> --- a/arch/arm64/include/asm/acpi.h >> +++ b/arch/arm64/include/asm/acpi.h >> @@ -22,6 +22,7 @@ >> #ifdef CONFIG_ACPI_APEI >> #include <linux/efi.h> >> #include <asm/pgtable.h> >> +#include <asm/tlbflush.h> >> #endif >> >> /* Macros for consistency checks of the GICC subtable of MADT */ >> @@ -52,6 +53,9 @@ typedef u64 phys_cpuid_t; >> extern int acpi_disabled; >> extern int acpi_noirq; >> extern int acpi_pci_disabled; >> +#ifdef CONFIG_ACPI_APEI >> +extern int acpi_disable_cmcff; >> +#endif >> >> static inline void disable_acpi(void) >> { >> @@ -89,6 +93,13 @@ static inline bool acpi_has_cpu_in_madt(void) >> static inline void arch_fix_phys_package_id(int num, u32 slot) { } >> void __init acpi_init_cpus(void); >> >> +#ifdef CONFIG_ACPI_APEI >> +static inline void arch_apei_flush_tlb_one(unsigned long addr) >> +{ >> + flush_tlb_kernel_range(addr, addr + PAGE_SIZE); >> +} >> +#endif > > Looking at the callers of this function, I suspect we could downgrade it > to a local CPU invalidation if we wanted. However, this isn't a hot-path > so it's fine to stay like it is for now. I suppose if we run "tlbi vae1" instead of "tlbi vae1is", it will be more efficient without side effect, since both ghes_ioremap_pfn_irq() and ghes_iounmap_irq() happen in same atomic context. However, today arch/arm64/include/asm/tlbflush.h does not have a function tailored for such performance optimization. Does it make sense to add a parameter to flush_tlb_kernel_range() to allow caller to make a choice? static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end, bool local) There are only two others callers of flush_tlb_kernel_range(). > > Will >
-- Jonathan (Zhixiong) Zhang The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project
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