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Subject[PATCH] EDAC, MCE, AMD: Don't emit 'CE' for Deferred error
Date
Currently, we also display 'CE' for a Deferred error.
like so-
[Hardware Error]: CPU:0 (15:2:0)
MC4_STATUS[Over|CE|MiscV|-|AddrV|Deferred|-|UECC]: 0xdc04b00095080813

When the 'UC' bit on MCx_STATUS register is clear, the error status
is either a Corrected error or Deferred error as determined by the
'Deferred' bit.

Refer AMD Error Scope Hierarchy table in a newer BKDG
(example: 49125_15h_Models_30h-3Fh_BKDG.pdf, section "RAS Features")
for clarification.

Therefore, fix the output to not disply 'CE'

Signed-off-by: Aravind Gopalakrishnan <aravind.gopalakrishnan@amd.com>
---
drivers/edac/mce_amd.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/edac/mce_amd.c b/drivers/edac/mce_amd.c
index 58586d5..e3a945c 100644
--- a/drivers/edac/mce_amd.c
+++ b/drivers/edac/mce_amd.c
@@ -763,7 +763,8 @@ int amd_decode_mce(struct notifier_block *nb, unsigned long val, void *data)
c->x86, c->x86_model, c->x86_mask,
m->bank,
((m->status & MCI_STATUS_OVER) ? "Over" : "-"),
- ((m->status & MCI_STATUS_UC) ? "UE" : "CE"),
+ ((m->status & MCI_STATUS_UC) ? "UE" :
+ (m->status & MCI_STATUS_DEFERRED) ? "-" : "CE"),
((m->status & MCI_STATUS_MISCV) ? "MiscV" : "-"),
((m->status & MCI_STATUS_PCC) ? "PCC" : "-"),
((m->status & MCI_STATUS_ADDRV) ? "AddrV" : "-"));
--
2.4.0


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