lkml.org 
[lkml]   [2015]   [Apr]   [20]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Subject[PATCH RESEND v5 0/5] powerpc8xx: Further optimisation of TLB handling
Date
This patchset provides a further optimisation of TLB handling in the 8xx.
Changes are:
- Not saving registers like CR when not needed
- Adding support to any TASK_SIZE

Only the last patch of the set is changed compared to v4

Resending with proper From: this time.

Christophe Leroy (5):
powerpc/8xx: macro for handling CPU15 errata
powerpc/8xx: Handle CR out of exception PROLOG/EPILOG
powerpc/8xx: dont save CR in SCRATCH registers
powerpc/8xx: Use SPRG2 instead of DAR for saving r3
powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000

arch/powerpc/kernel/head_8xx.S | 79 +++++++++++++++++++++++++++---------------
1 file changed, 51 insertions(+), 28 deletions(-)

--
2.1.0



\
 
 \ /
  Last update: 2015-04-20 08:21    [W:0.059 / U:0.096 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site