Messages in this thread | | | From | Andy Lutomirski <> | Date | Fri, 10 Apr 2015 13:47:37 -0700 | Subject | Re: [PATCH 4/8] x86: Add support for rd/wr fs/gs base |
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On Fri, Apr 10, 2015 at 1:41 PM, Andi Kleen <ak@linux.intel.com> wrote: >> It wouldn't take any additional memory at all. Currently we have 8k >> of "debug" stack which is really two 4k pieces, and you're putting the >> kernel gs base in the bottom word. I'm suggesting that you duplicate >> the kernel gs base at the bottom work and the bottom word + 4k. We >> already have a hard limit of 4k of debug stack because of the IST >> shift mechanism -- it really is two separate 4k stacks, not one 8k >> stack. > > Seems like a hack. What happens if we add an uneven number of stacks?
This works for DEBUG_STKSZ == n * EXCEPTION_STKSZ for any n. Just duplicate the pointer n times.
I think all of this stems from unfortunate naming. DEBUG_STACK isn't one stack -- it's a debug stack *array*. The IST shift mechanism means that we can use different entries in that array as our stacks depending on how deeply nested we are.
> > Just handling it in the code is simple enough.
It seems to account for over half the asm diff. I'm talking about the addition of approximately two lines of C and the removal of a huge chunk of the asm diff.
--Andy
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