Messages in this thread Patch in this message | | | From | Alexandre Belloni <> | Subject | [PATCHv2] ARM: at91/dt: sam9261: Fix PLL output ranges and other clocks divisors | Date | Mon, 12 May 2014 16:22:12 +0200 |
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Argument 3 (OUT) and 4 (ICPLL) of the atmel,pll-clk-output-ranges were missing. Also, the at91sam9261 doesn't really have a by 3 divisor.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> --- Changed in v2: After getting feedback from the atmel HW engineers, it appears that PLLB is not the same as PLLA despite what the datasheet seems to imply. The patch is updated to reflect that.
arch/arm/boot/dts/at91sam9261.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi index 561addceb81e..44d9e5ab09c3 100644 --- a/arch/arm/boot/dts/at91sam9261.dtsi +++ b/arch/arm/boot/dts/at91sam9261.dtsi @@ -564,7 +564,8 @@ reg = <0>; atmel,clk-input-range = <1000000 32000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <80000000 200000000 0 1>, + <190000000 240000000 2 1>; }; pllb: pllbck { @@ -573,9 +574,9 @@ interrupts-extended = <&pmc AT91_PMC_LOCKB>; clocks = <&main>; reg = <1>; - atmel,clk-input-range = <1000000 32000000>; + atmel,clk-input-range = <1000000 5000000>; #atmel,pll-clk-output-range-cells = <4>; - atmel,pll-clk-output-ranges = <80000000 200000000 190000000 240000000>; + atmel,pll-clk-output-ranges = <70000000 130000000 1 1>; }; mck: masterck { @@ -584,13 +585,13 @@ interrupts-extended = <&pmc AT91_PMC_MCKRDY>; clocks = <&clk32k>, <&main>, <&plla>, <&pllb>; atmel,clk-output-range = <0 94000000>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; }; usb: usbck { compatible = "atmel,at91rm9200-clk-usb"; #clock-cells = <0>; - atmel,clk-divisors = <1 2 4 3>; + atmel,clk-divisors = <1 2 4 0>; clocks = <&pllb>; }; -- 1.9.1
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