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Subject[PATCH 0/7] Reorder i.MX IPU display enable/disable sequence
Date
Repeatedly enabling and disabling the display currently can lead to a state
in which the IPU doesn't produce a valid signal anymore because we disable
IPU submodules before they can finish their interaction.

This series reorders the enable/disable sequence so that we first wait for the
DC/DP to finish processing the current frame, then stop the DI and IDMAC, and
only then disable clocks to the submodules. Also from now on we disable the DC
when it is not in use.

regards
Philipp

Philipp Zabel (7):
imx-drm: ipu-common: add ipu_map_irq to request non-IDMAC interrupts
imx-drm: ipu-common: Add helpers to check for a busy IDMAC channel and
to busywait for an interrupt
imx-drm: ipu-dmfc: Wait for FIFOs to run empty before disabling
imx-drm: ipu-dc: Wait for DC_FC_1 / DP_SF_END interrupt
imx-drm: ipu-dp: Split disabling the DP foreground channel from
disabling the DP module
imx-drm: imx-dp: When disabling the DP foreground channel, wait until
the DP background channel is finished before disabling the IDMAC
channel
imx-drm: ipuv3-crtc: Change display enable/disable order

drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.h | 3 ++
drivers/staging/imx-drm/ipu-v3/ipu-common.c | 41 ++++++++++++++---
drivers/staging/imx-drm/ipu-v3/ipu-dc.c | 71 ++++++++++++++++++++---------
drivers/staging/imx-drm/ipu-v3/ipu-dmfc.c | 25 +++++++++-
drivers/staging/imx-drm/ipu-v3/ipu-dp.c | 71 +++++++++++++++++++----------
drivers/staging/imx-drm/ipu-v3/ipu-prv.h | 3 ++
drivers/staging/imx-drm/ipuv3-crtc.c | 10 ++--
drivers/staging/imx-drm/ipuv3-plane.c | 4 ++
8 files changed, 173 insertions(+), 55 deletions(-)

--
1.9.1



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