Messages in this thread Patch in this message | | | From | Srikanth Thokala <> | Subject | [PATCH] Documentation: memory-barriers: Fix typo in the first example | Date | Tue, 18 Nov 2014 10:09:58 +0530 |
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In the first example, the loads into 'x' and 'y' on CPU 2 doesn't match the sequence of events described below it. To match the sequence of events, the values of 'A' and 'B' should be loaded into 'x' and 'y' respectively.
Signed-off-by: Srikanth Thokala <sriku.linux@gmail.com> --- Documentation/memory-barriers.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/Documentation/memory-barriers.txt b/Documentation/memory-barriers.txt index 22a969c..2770bce 100644 --- a/Documentation/memory-barriers.txt +++ b/Documentation/memory-barriers.txt @@ -115,8 +115,8 @@ For example, consider the following sequence of events: CPU 1 CPU 2 =============== =============== { A == 1; B == 2 } - A = 3; x = B; - B = 4; y = A; + A = 3; x = A; + B = 4; y = B; The set of accesses as seen by the memory system in the middle can be arranged in 24 different combinations: -- 1.9.1
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