Messages in this thread | | | Date | Mon, 16 Sep 2013 12:58:02 +0200 | From | Peter Zijlstra <> | Subject | Re: [PATCH 1/6] perf, core: Add generic transaction flags v4 |
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On Fri, Sep 13, 2013 at 11:08:31AM -0700, Andi Kleen wrote: > /* > + * Values for the transaction event qualifier, mostly for abort events. > + * Multiple bits can be set. > + */ > +enum { > + PERF_SAMPLE_TXN_ELISION = (1 << 0), /* From elision */ > + PERF_SAMPLE_TXN_TRANSACTION = (1 << 1), /* From transaction */ > + PERF_SAMPLE_TXN_SYNC = (1 << 2), /* Instruction is related */ > + PERF_SAMPLE_TXN_ASYNC = (1 << 3), /* Instruction not related */ > + PERF_SAMPLE_TXN_RETRY = (1 << 4), /* Retry possible */ > + PERF_SAMPLE_TXN_CONFLICT = (1 << 5), /* Conflict abort */ > + PERF_SAMPLE_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ > + PERF_SAMPLE_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ > + > + PERF_SAMPLE_TXN_MAX = (1 << 8), /* non-ABI */ > + > + /* bits 24..31 are reserved for the abort code */ > + > + PERF_SAMPLE_TXN_ABORT_MASK = 0xff000000, > + PERF_SAMPLE_TXN_ABORT_SHIFT = 24, > +};
Why bits 24..31 ? Why not push the abort code into the upper 32 bits?
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