lkml.org 
[lkml]   [2013]   [Mar]   [13]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
Date
SubjectRE: [PATCH 2/2] PCI: fix system hang issue of Marvell SATA host controller
Hi, Bjorn

> >> > Now, the situation is like this:
> >> > I captured the PCIE trace with analyzer and found that 1st BE is 0x1111
> >> > when
> >> > accessing IO port space. But 9125 spec has some limitation, and the BE
> >> > must
> >> > be
> >> > 0x0100, to access the 2nd byte only. So, the chip will go to bad.
> >>
> >> Great, this is new, interesting, data. Is the 9125 spec publicly
> >> accessible and/or could you elaborate on the "some limitation"
> >> comment?
> > 9125 spec is publicly accessible.
If you can't see the pic, please open the attachment. Thanks!


[unhandled content-type:application/octet-stream]
\
 
 \ /
  Last update: 2013-03-13 11:21    [W:0.150 / U:0.396 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site