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SubjectRe: [PATCH 0/7] perf, x86: Implement AMD IBS
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On Mon, 2011-08-01 at 07:21 +0200, Robert Richter wrote:

> IBS is supposed to be architectural spec'ed, meaning there are no
> family checks. IBS features are detected using cpuid.
>
> So the version of the raw sampling data format could be specified with
> the u32 capability variable. I could put the caps value to the raw
> sample data too right after the size field. An additional advantage
> would be that 64 bit values are memory alligned then.

Seems like a good filler :-)

> The Branch Target Address register that has been added to newer cpus
> could simply be extended to the raw data sample, the data would still
> be backward compatible. Userland can detect it existence from the
> sample size or (better) from the ibs caps.

Caps would be better.

> Though it is treated architectural, it isn't in the AMD64 Architecture
> Programmer's Manual (APM). The 10h BKDG is a good source, but extended
> IBS features are described in the family 12h bkdg (same as for 15h)
> and the capabilities are in the cpuid spec:
>
> http://support.amd.com/us/Processor_TechDocs/41131.pdf
> http://support.amd.com/us/Processor_TechDocs/25481.pdf

Right, so comparing Fam10 to Fam12,

+ IbsOpCtl.19:58
+ IbsOpData.38
- IbsOpData2.4:5
+ IbsOpData3.19
+ IbsBrTarget

Curious that they removed a few bits, those don't seem to be enumerated
in the IBS capability field either.


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