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Subject[PATCH] ALSA: hda: Only write ICH6_PCIREG_TCSEL on Intel systems.
Hi,

azx_init_pci() always writes PCI config register ICH6_PCIREG_TCSEL
although this looks to be only defined on Intel systems and has a
different meaning on AMD systems. On AMD systems the PCI interrupt pin
control register is modified instead. Since the register has 'ICH' in
its name I pulled the call to update_pci_byte() into the switch block to
only happen on Intel variants. I'm not sure on the other variants.

Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>
---
sound/pci/hda/hda_intel.c | 15 ++++++++-------
1 files changed, 8 insertions(+), 7 deletions(-)

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index fcedad9..41debbd 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1049,13 +1049,6 @@ static void azx_init_pci(struct azx *chip)
{
unsigned short snoop;

- /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
- * TCSEL == Traffic Class Select Register, which sets PCI express QOS
- * Ensuring these bits are 0 clears playback static on some HD Audio
- * codecs
- */
- update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
-
switch (chip->driver_type) {
case AZX_DRIVER_ATI:
/* For ATI SB450 azalia HD audio, we need to enable snoop */
@@ -1087,6 +1080,14 @@ static void azx_init_pci(struct azx *chip)
(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)
? "Failed" : "OK");
}
+ /* fall through */
+ case AZX_DRIVER_ICH:
+ /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
+ * TCSEL == Traffic Class Select Register, which sets PCI
+ * express QOS Ensuring these bits are 0 clears playback
+ * static on some HD Audio codecs
+ */
+ update_pci_byte(chip->pci, ICH6_PCIREG_TCSEL, 0x07, 0);
break;

}
--
1.7.2.3

Adam
--
Adam adam@os.inf.tu-dresden.de
Lackorzynski http://os.inf.tu-dresden.de/~adam/


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