lkml.org 
[lkml]   [2011]   [Nov]   [8]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: [PATCH] pci: More PRI/PASID cleanup
On Tue, Nov 08, 2011 at 09:44:30AM -0700, Alex Williamson wrote:

> bit 0 (PCI_PASID_ENABLE) is reserved in the CAP register...

Is it? Which spec are you using? In my version it is not reserved but
states if it is supported to set the enable-bit.

> Which means we need to check CTRL, not CAP to see if it was previously
> enabled... or maybe this check is entirely wrong and we're was trying to
> see if enable is supported.

I will check how this looks in my test environment.

> And nobody exposes PCI_PASID_ENABLE because it doesn't exist as a
> capability.
>
> It's easy to see this if the bit definitions are named appropriately and
> specified per register instead of being lumped together as "close
> enough". Thanks,

I don't object against your renames as long as it doesn't cause
merge-conflicts with what I plan to send upstream.

Thanks,

Joerg

--
AMD Operating System Research Center

Advanced Micro Devices GmbH Einsteinring 24 85609 Dornach
General Managers: Alberto Bozzo, Andrew Bowd
Registration: Dornach, Landkr. Muenchen; Registerger. Muenchen, HRB Nr. 43632



\
 
 \ /
  Last update: 2011-11-08 18:19    [W:0.038 / U:0.512 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site