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SubjectRe: Locking in the clk API
On 11/01/11 11:15, Richard Zhao wrote:
> 2011/1/11 Uwe Kleine-König <u.kleine-koenig@pengutronix.de>:

[snip]

> A well running board will not enable/disable PLLs frequently. It don't
> make sense. PLLs are normally disabled on request to enter low power
> mode, rather not because all their child clocks are disabled. So we
> don't have to consider the time here.

I'd rather see that if all child clocks are disabled the PLL is
powered down then. It means PLLs _could_ be left running even
when power-down mode is selected because the system still thinks
that a peripheral is using them.

If you want to make it so that each low-power mode has to work
out what PLLs need to be disabled and then re-enabled makes me
want to be sick. Hiding this stuff behind specific implementations
is a recipe for disaster.
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