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SubjectRe: [PATCH v2 13/20] ARM: LPAE: Add SMP support for the 3-level page table format
On Fri, Nov 12, 2010 at 06:00:33PM +0000, Catalin Marinas wrote:
> With 3-level page tables, starting secondary CPUs required allocating
> the pgd as well. Since LPAE Linux uses TTBR1 for the kernel page tables,
> this patch reorders the CPU setup call in the head.S file so that the
> swapper_pg_dir is used. TTBR0 is set to the value generated by the
> primary CPU.

> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
> ---
> arch/arm/kernel/head.S | 10 +++++-----
> arch/arm/kernel/smp.c | 39 +++++++++++++++++++++++++++++++++++++--
> 2 files changed, 42 insertions(+), 7 deletions(-)
>
> diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S
> index fd8a29e..b54d00e 100644
> --- a/arch/arm/kernel/head.S
> +++ b/arch/arm/kernel/head.S
> @@ -321,6 +321,10 @@ ENTRY(secondary_startup)
> moveq r0, #'p' @ yes, error 'p'
> beq __error_p
>
> + pgtbl r4
> + add r12, r10, #BSYM(PROCINFO_INITFUNC)
> + blx r12 @ initialise processor
> + @ (return control reg)

I really don't like this being different in ordering from the boot
CPU bring up. If we want to have the init function dealing with
split page tables, we should pass in two pointers for it in both
paths.



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