Messages in this thread | | | Date | Fri, 04 Sep 2009 09:01:35 -0700 | From | Jeremy Fitzhardinge <> | Subject | Re: [tip:x86/asm] x86/i386: Make sure stack-protector segment base is cache aligned |
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On 09/03/09 20:35, H. Peter Anvin wrote: > On 09/03/2009 07:59 PM, Tejun Heo wrote: > >> Another question. Other than saving and loading an extra segment >> register on kernel entry/exit, whether using the same or different >> segment registers doesn't look like would make difference >> performance-wise. If I'm interpreting the wording in the optimization >> manual correctly, it means that each non-zero segment based memory >> access will be costly regardless of which specific segment register is >> in use and there's no way we can merge segment based dereferences for >> stackprotector and percpu variables. >> >> > It's correct that it doesn't make any difference for access, only for load. >
Well, to be completely precise, restore. When returning to usermode, the "pop %seg" is slightly faster if you're restoring a null selector, which is typically the case for %fs as 32-bit usermode doesn't use it.
J
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