Messages in this thread Patch in this message | | | From | Paul Walmsley <> | Subject | [PATCH B 08/10] OMAP: wait for pwrdm transition after clk_enable() | Date | Tue, 27 Jan 2009 19:44:31 -0700 |
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From: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Enabling clock in a disabled power domain causes the power domain to be turned on. However, the power transition is not always finished when clk_enable() returns and this randomly crashes the kernel when an interrupt happens right after the clk_enable, and the kernel tries to read the irq status register for that domain.
Why the irq status register is inaccessible, I don't know. Also it doesn't seem to be related to the module being not powered up, but to the transition itself.
The same could perhaps happen after clk_disable also, but I have not witnessed that.
The problem affects at least dss, cam and sgx clocks.
This change waits for the transition to be finished before returning from omap2_clkdm_clk_enable().
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com> Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com> --- arch/arm/mach-omap2/clockdomain.c | 2 ++ 1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index 882809d..ad6dfe4 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -561,6 +561,8 @@ int omap2_clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) else omap2_clkdm_wakeup(clkdm); + pwrdm_wait_transition(clkdm->pwrdm.ptr); + return 0; }
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