Messages in this thread | | | Date | Sat, 27 Jan 2007 10:20:18 +0100 | From | Thomas Hellström <> | Subject | Support for i386 PATs |
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Hi!
Does anybody have a strong opinion against adding support for i386 Page Attribute Tables?
The main benefit would be that one can have write-combining memory regions without setting up MTRRs. This will come in handy for a device we're working with where the device driver needs to allocate the display memory directly from system memory, and it may be difficult to fit the mtrr alignment constraints.
Outline: The PAT may be set up at boot time with fixed backwards-compatible memory types for the different PAT entries + defines like the following:
#define _PAGE_PAT_WB xxx #define _PAGE_PAT_WT xxx #define _PAGE_PAT_UC0 xxx #define _PAGE_PAT_UC1 xxx #define _PAGE_PAT_WC xxx
which can be used in parallel with the old _PAGE_PWT and _PAGE_PCD bits.
The idea is that new memory types, WC for example, will use the pat entries 7 downto 4, whereas 0-3 are left to boot setting to maintain backwards compatibility.
Issues: 1) The _PAGE_BIT_PAT will be the same as _PAGE_PSE, and _PAGE_PROTNONE. As I understand it, _PAGE_PROTNONE is not used when the page is present, so this might not be an issue. What about _PAGE_PSE?
2) The PATs need to be setup for each processor just after system boot. Where is the best place to do this?
/Thomas Hellström
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