Messages in this thread | | | Subject | Re: Memory barriers and spin_unlock safety | From | Alan Cox <> | Date | Sun, 12 Mar 2006 18:09:12 +0000 |
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On Gwe, 2006-03-10 at 19:19 -0600, Robert Hancock wrote: > PCI I/O writes are allowed to be posted by the host bus bridge (not > other bridges) according to the PCI 2.2 spec. Maybe no x86 platform > actually does this, but it's allowed, so technically a device would need > to do a read in order to ensure that I/O writes have arrived at the > device as well.
Existing Linux drivers largely believe that PCI I/O cycles as opposed to MMIO cycles are not posted. At least one MIPS platform that did post them ended up ensuring PCI I/O cycle posting didn't occur to get a running Linux system - so its quite a deep assumption.
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