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SubjectRe: Possible dcache BUG
Date
On Friday 20 August 2004 16:11, R. J. Wysocki wrote:[...]

>There's a simple test you can do unless your DIMMs must go in pairs
> (I don't remember if it's required by nforce2): remove one of them
> and see what happens.

To get dual channel DDR, they have to be in a pair. Since this post,
they've been swapped one for the other, and I'll be curious to see if
the address goes to an even address when it errors, which it hasn't
yet.

> If you can reproduce the same symptoms on
> each of them separately, I'd bet on a cache problem.
>
That makes sense, so I can try that too. I hadn't thought of that,
duh!
>Greetings,

Someone else asked if ECC was on, but this board doesn't have it, and
the memory has a blank pattern where the parity chip would be. So I
think its safe to say no :)

--
Cheers, Gene
"There are four boxes to be used in defense of liberty:
soap, ballot, jury, and ammo. Please use in that order."
-Ed Howdershelt (Author)
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by Gene Heskett are:
Copyright 2004 by Maurice Eugene Heskett, all rights reserved.
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