Messages in this thread | | | Date | Wed, 10 Sep 2003 20:40:42 +0100 | From | Jamie Lokier <> | Subject | Re: Efficient IPC mechanism on Linux |
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Pavel Machek wrote: > Can you make it available so we can test on, say, 900MHz athlon? Or > you can have it tested on 1800MHz athlon64, that's about as high end > as it can get.
I just deleted the program, so here's a rewrite :)
#include <sys/mman.h>
int main() { int i, j; for (j = 0; j < 64; j++) { volatile char * ptr = mmap (0, 4096 * 4096, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANON, -1, 0); for (i = 0; i < 4096; i++) { #if 1 *(ptr + 4096 * i) = 0; /* Write */ #else (void) *(ptr + 4096 * i); /* Read */ #endif } munmap ((void *) ptr, 4096 * 4096); } return 0; }
Smallest results, from "gcc -o test test.c -O2; time ./test" on a 1500MHz dual Athlon 1800 MP:
Write: real 0m1.316s user 0m0.059s sys 0m1.256s
==> 7531 cycles per page
Read: real 0m0.199s user 0m0.053s sys 0m0.146s
==> 1139 cycles per page
As I said, it's a crude upper bound.
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