Messages in this thread | | | Date | Mon, 23 Sep 2002 13:57:08 -0700 (PDT) | Subject | Re: DAC960 in 2.5.38, with new changes | From | "David S. Miller" <> |
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From: David Mosberger <davidm@napali.hpl.hp.com> Date: Mon, 23 Sep 2002 13:53:13 -0700
> Or perhaps every platform should provide a writeq(), on 32-bit systems > it may merely be implemented as two consequetive writel() calls. True, but I was wondering whether driver writers will have an implicit assumption on readX/writeX being atomic. I don't think anyone ever promised that, but I suspect all existing implementations are indeed atomic (it's true even for old Alphas which don't have sub-word load/stores). On many platforms, two consequetive __raw_writel()'s might even combine to an atomic 64-bit store to PCI space. :-)
I don't think the proposed 32-bit behavior is off the mark, and anyways x86 can actually make the 64-bit store I believe if it wants at least on more recent processors. - To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
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