Messages in this thread |  | | Subject | Re: Early SPECWeb99 results on 2.5.33 with TSO on e1000 | From | (Eric W. Biederman) | Date | 11 Sep 2002 03:11:49 -0600 |
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"Martin J. Bligh" <Martin.Bligh@us.ibm.com> writes:
> > Ie. the headers that don't need to go across the bus are the critical > > resource saved by TSO. > > I'm not sure that's entirely true in this case - the Netfinity > 8500R is slightly unusual in that it has 3 or 4 PCI buses, and > there's 4 - 8 gigabit ethernet cards in this beast spread around > different buses (Troy - are we still just using 4? ... and what's > the raw bandwidth of data we're pushing? ... it's not huge). > > I think we're CPU limited (there's no idle time on this machine), > which is odd for an 8 CPU 900MHz P3 Xeon,
Quite possibly. The P3 has roughly an 800MB/s FSB bandwidth, that must be used for both I/O and memory accesses. So just driving a gige card at wire speed takes a considerable portion of the cpus capacity.
On analyzing this kind of thing I usually find it quite helpful to compute what the hardware can theoretically to get a feel where the bottlenecks should be.
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