Messages in this thread |  | | Date | Thu, 22 Aug 2002 20:11:12 -0700 (PDT) | From | Andre Hedrick <> | Subject | RE: hpt374 / BUG(); |
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I just got a reply from HighPoint and they claim they do not have support for a 66MHz base PLL for hpt374/hpt372.
So that make is more interesting.
On Thu, 22 Aug 2002, Ulf-Andre Gramstad wrote:
> > You have a system where it actually have the PLL already set and in > > 66-clock base? You are the first person to ever hit this BUG(). > > I will need to work with HighPoint to finish the timing table. > > > > If you would have several device of various max transfer rate limits you > > could attach without the driver being built it, it would give me a few > > data point to verify if the table I have started is even close. > > My HPT374 controller works with the new 2.4.20-pre2-ac6 patch, running at > ATA-66. > /proc/ide/hpt366 shows only primary and secondary channel, so I guess thats > why the hard drives on channel 3 and 4 is not working? > > > - > UAG > > - > To unsubscribe from this list: send the line "unsubscribe linux-kernel" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html > Please read the FAQ at http://www.tux.org/lkml/ >
Andre Hedrick LAD Storage Consulting Group
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