lkml.org 
[lkml]   [2002]   [Aug]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
From
SubjectRE: hpt374 / BUG();
Date
> You have a system where it actually have the PLL already set and in
> 66-clock base? You are the first person to ever hit this BUG().
> I will need to work with HighPoint to finish the timing table.
>
> If you would have several device of various max transfer rate limits you
> could attach without the driver being built it, it would give me a few
> data point to verify if the table I have started is even close.

My HPT374 controller works with the new 2.4.20-pre2-ac6 patch, running at
ATA-66.
/proc/ide/hpt366 shows only primary and secondary channel, so I guess thats
why the hard drives on channel 3 and 4 is not working?


-
UAG

-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/

\
 
 \ /
  Last update: 2005-03-22 13:28    [W:0.124 / U:98.344 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site