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SubjectRe: PCI DMA to small buffers on cache-incoherent arch
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   From: "Albert D. Cahalan" <acahalan@cs.uml.edu>
Date: Sat, 8 Jun 2002 21:30:31 -0400 (EDT)

On a non-SMP system, would it be OK to map all the memory
without memory coherency enabled? You seem to be implying that
one only needs to implement some mechanism in pci_map_single()
to handle flushing cache lines (write back, then invalidate).

This would be useful for Macs.

It's just avoiding flushing by effecting flushing the cache after
every load/store the cpu does, so of course it would work.

It would be slow as hell, but it would work.
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