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    SubjectRE: [PATCH][2.4] generic cluster APIC support for systems with m ore than 8 CPUs
    > One thing I will say. Your code would be a hell of a lot saner for
    > merging if you mapped the ISA/Legacy IRQ's as 0-15 (to software) and the
    > PCI ones to 16+ like everyone else does. That would kill a _lot_ of
    > ifdefs and the IRQ0 corner case

    If you have a suggestion on how to do that, I am sure we would
    all be grateful to hear it.

    Note that the reason the code _exists_ is because the interrupt
    lines are physically connected to different pins on the APIC
    than they are in "normal" systems. The legitimacy of that
    decision is not up for debate at this point -- that is the way
    the system was built, and Linux needs to deal with it in
    order to run on it.

    So the PCI interrupts are in the table at IRQs < 16 (because
    it tells which pin is being used), which makes it difficult
    to tell whether a PCI or an ISA interrupt is being requested
    if you tell the code "irq 3": if ISA, you need to use pin f(X),
    while if PCI, you use pin X.

    ACPI should have the ISA redirection information, but as
    Natalie was saying, drivers hard-code the ISA vectors without
    checking the ACPI info.

    I suppose it would be possible to detect the ES7000 and have
    the kernel re-write the PCI vectors (say, add 16 to them all)
    and then re-mangle them based on a "< 16" criteria.
    But I don't believe that is a "clean" solution either
    (and would break when the ACPI isa redirection table is
    properly used).

    Anyway, this was the reason for the "severe irq override"
    comment by Natalie.

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