Messages in this thread |  | | Date | Fri, 10 Nov 2000 13:50:04 -0500 | From | Brian Gerst <> | Subject | Re: [Fwd: CPU detection revamp (Request for comments)] |
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davej@suse.de wrote: > > Hi hpa, > > First test, the AMD K6-2. > > Also, look at the feature flags: > before: > flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mmx 3dnow > > after: > features : fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow > > Note, I lost MTRR & sep. This may be related to the stepping bug > though. I'll recompile a kernel with the &15 fix, and see if that cures > all.
The K6's don't support sysenter/sysexit. It really should have been marked differently before. The early K6's used extended bit 10 to indicate syscall/sysret capabality, but this version has some quirks that make it pretty much unusable. Later K6's use extended bit 11 to indicate syscall/sysret.
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