[lkml]   [2000]   [Nov]   [10]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
Messages in this thread
SubjectRe: [Fwd: CPU detection revamp (Request for comments)] wrote:

> On Fri, 10 Nov 2000, Brian Gerst wrote:
> > > features : fpu vme de pse tsc msr mce cx8 pge mmx syscall 3dnow
> >
> > The K6's don't support sysenter/sysexit.
> The K6 datasheets suggests otherwise.
> Some models seem to have sysenter/sysexit, whilst others have
> syscall/sysret. No model seems to have both.

Athlons have both. Since the ext-bit 10 stuff is useless, I haven't
bothered reporting it at all.

> The datasheets are somewhat confusing, as it doesn't mention bit 10
> at all, just an oversized box for bit 11.
> > It really should have been marked differently before.
> Before we weren't mentioning it at all, look..
> flags : fpu vme de pse tsc msr mce cx8 sep mtrr pge mmx 3dnow
> > The early K6's used extended bit 10 to indicate syscall/sysret
> > capabality, but this version has some quirks that make it pretty much
> > unusable. Later K6's use extended bit 11 to indicate syscall/sysret.
> And where does sysenter/sysexit fit in?

sysenter/sysexit is the "sep" feature.


<> at work, <> in private!
"Unix gives you enough rope to shoot yourself in the foot."
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to
Please read the FAQ at

 \ /
  Last update: 2005-03-22 12:45    [W:0.045 / U:0.628 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site