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SubjectProblem with intel PIC on StrongARM
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Hello,

While trying to run Linux on a DNARD, which basically consists of a
StrongARM Processor and some PC-style hardware around it, I ran into a
problem with the interrupt controller.

Here comes a short description of what happens, if anyone wants the complete
code or something, please tell me.

The kernel boots and Interrupts are working OK. BogoMIPS are counted,
rarp-requests are sent and the root-fs is mounted via nfs.
But after that, as soon as I try to execute a program, the machine hangs. I
traced it back to the following: The nfs-code sends asynchronous
nfs-requests, but gets no answer. It then switches to synchronous nfs and
waits forever. I printed the registers of the PIC at that momemnt and got
a 5 in the request register (irr) and a one in the service register (isr).
According to the documentation, there are two ways to move something to the
isr, INTA pulses from the cpu, and poll-commands. I found that whenever my
interrupt entry code is called, the isr is zero, so I assume that the ARM
doesn't give any INTA-pulses. So I do a poll-command. I doublechecked that
there is something in the isr when the poll-command tells me there is an
interrupt (and only then). I also checked that everytime the poll-command
shows an interrupt, do_IRQ is called and thus mask_and_ack is called.
After the mask_and_ack the isr is zero again.

So where am I wrong here? According to the documentation from Intel this
situation is impossible (or at least the way I read it). When I insert a
do_IRQ(0); do_IRQ(10); at the point it hangs, it loads a shell (also it
takes 8 minutes) and I can execute some commands. So the PIC really locks up
as soon as there are some more IRQs. (Same happens when mounting root from
an ide harddisc).

The PIC is configured to edge-triggerd, the kernel is 2.2.9 with some
arm-specific patches.

Does anyone have any idea what is going wrong?

Thanks in advance
Alexander

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