Messages in this thread | | | From | (Linus Torvalds) | Subject | Re: Cyrix 6x86MX and Centaur C6 CPUs in 2.1.102 | Date | 18 May 1998 19:36:07 GMT |
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In article <Pine.LNX.3.96.980518125553.560A-100000@eiterra>, Phil's Kernel Account <kernel@eiterra.nls.net> wrote: > >if ((boot_cpu_data.x86_capability & 16) && (boot_cpu_data.x86_vendor != >X86_VENDOR_CYRIX) && (boot_cpu_data.x86_vendor == X86_VENDOR_CENTAUR >(boot_cpu_data.x86_stepping == 0))) {
This is not the way to do it.
The line should read just
if (boot_cpu_data.x86_capability & 16) { ...
and that's it. Look at how 2.1.102 handles this: the cyrix-specific setup code will zero out the TSC bit from the capability mask, because Cyrix in essense does not _have_ a TSC that is correct.
Zeroing out the bit automatically means that everything in the kernel that would try to use the TSC notices that it doesn't exist, and the problem is solved. And the only cyrix-specific code is exactly where it should be, ie in the cpuinfo setup code.
Linus
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