Messages in this thread Patch in this message | | | From | Seongsu Park <> | Subject | [PATCH v3] arm64: Cleanup __cpu_set_tcr_t0sz() | Date | Mon, 8 Apr 2024 11:40:16 +0900 |
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In cpu_set_default_tcr_t0sz(), it is an error to shift TCR_T0SZ_OFFSET twice form TCR_T0SZ() and __cpu_set_tcr_t0sz(). Since TCR_T0SZ_OFFSET is 0, no error occurred. We need to clarify whether the parameter of __cpu_set_tcr_t0sz is a shifted value or an unshifted value.
We have already shifted the value of t0sz in TCR_T0SZ by TCR_T0SZ_OFFSET. This is necessary for consistency with TCR_T1SZ. Therefore, the parameter of __cpu_set_tcr_t0sz is clarified as a shifted value.
Co-developed-by: Leem ChaeHoon <infinite.run@gmail.com> Signed-off-by: Leem ChaeHoon <infinite.run@gmail.com> Co-developed-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Signed-off-by: Gyeonggeon Choi <gychoi@student.42seoul.kr> Co-developed-by: Soomin Cho <to.soomin@gmail.com> Signed-off-by: Soomin Cho <to.soomin@gmail.com> Co-developed-by: DaeRo Lee <skseofh@gmail.com> Signed-off-by: DaeRo Lee <skseofh@gmail.com> Co-developed-by: kmasta <kmasta.study@gmail.com> Signed-off-by: kmasta <kmasta.study@gmail.com> Signed-off-by: Seongsu Park <sgsu.park@samsung.com> ---
v2: - Condition is updated v3: - Commit message is updated - cpu_set_tcr_t0sz macro is added
--- arch/arm64/include/asm/mmu_context.h | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index c768d16b81a4..fb603ec7f61f 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -72,15 +72,16 @@ static inline void __cpu_set_tcr_t0sz(unsigned long t0sz) { unsigned long tcr = read_sysreg(tcr_el1); - if ((tcr & TCR_T0SZ_MASK) >> TCR_T0SZ_OFFSET == t0sz) + if ((tcr & TCR_T0SZ_MASK) == t0sz) return; tcr &= ~TCR_T0SZ_MASK; - tcr |= t0sz << TCR_T0SZ_OFFSET; + tcr |= t0sz; write_sysreg(tcr, tcr_el1); isb(); } +#define cpu_set_tcr_t0sz(t0sz) __cpu_set_tcr_t0sz(TCR_T0SZ(t0sz)) #define cpu_set_default_tcr_t0sz() __cpu_set_tcr_t0sz(TCR_T0SZ(vabits_actual)) #define cpu_set_idmap_tcr_t0sz() __cpu_set_tcr_t0sz(idmap_t0sz) @@ -134,7 +135,7 @@ static inline void cpu_install_ttbr0(phys_addr_t ttbr0, unsigned long t0sz) { cpu_set_reserved_ttbr0(); local_flush_tlb_all(); - __cpu_set_tcr_t0sz(t0sz); + cpu_set_tcr_t0sz(t0sz); /* avoid cpu_switch_mm() and its SW-PAN and CNP interactions */ write_sysreg(ttbr0, ttbr0_el1); -- 2.34.1
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