Messages in this thread | | | From | Puranjay Mohan <> | Subject | [PATCH bpf-next v2 0/2] riscv, bpf: Support per-CPU insn and inline bpf_get_smp_processor_id() | Date | Tue, 30 Apr 2024 17:58:32 +0000 |
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Changes in v1->v2: v1: https://lore.kernel.org/all/20240405124348.27644-1-puranjay12@gmail.com/ - Use emit_addr() in place of emit_imm() in the first patch. - Add the second patch to inline bpf_get_smp_processor_id()
The first patch add the support for the internal-only MOV instruction to resolve per-CPU addrs to absolute addresses. RISC-V uses generic per-cpu implementation where the offsets for CPUs are kept in an array called __per_cpu_offset[cpu_number]. RISCV stores the address of the task_struct in TP register. The first element in task_struct is struct thread_info, and we can get the cpu number by reading from the TP register + offsetof(struct thread_info, cpu).
The second patch inlines the calls bpf_get_smp_processor_id() in the JIT by emitting a load from the TP + offsetof(struct thread_info, cpu).
Benchmark using [1] on Qemu.
./benchs/run_bench_trigger.sh glob-arr-inc arr-inc hash-inc
+---------------+------------------+------------------+--------------+ | Name | Before | After | % change | |---------------+------------------+------------------+--------------| | glob-arr-inc | 1.077 ± 0.006M/s | 1.336 ± 0.010M/s | + 24.04% | | arr-inc | 1.078 ± 0.002M/s | 1.332 ± 0.015M/s | + 23.56% | | hash-inc | 0.494 ± 0.004M/s | 0.653 ± 0.001M/s | + 32.18% | +---------------+------------------+------------------+--------------+
[1] https://github.com/anakryiko/linux/commit/8dec900975ef
Puranjay Mohan (2): riscv, bpf: add internal-only MOV instruction to resolve per-CPU addrs riscv, bpf: inline bpf_get_smp_processor_id()
arch/riscv/net/bpf_jit_comp64.c | 50 +++++++++++++++++++++++++++++++++ include/linux/filter.h | 1 + kernel/bpf/core.c | 11 ++++++++ kernel/bpf/verifier.c | 2 ++ 4 files changed, 64 insertions(+)
-- 2.40.1
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