Messages in this thread | | | From | Geert Uytterhoeven <> | Date | Tue, 2 Apr 2024 15:43:00 +0200 | Subject | Re: [PATCH net-next 1/3] dt-bindings: net: renesas,rzn1-gmac: Document RZ/N1 GMAC support |
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Hi Romain,
On Tue, Apr 2, 2024 at 2:36 PM Romain Gantois <romain.gantois@bootlin.com> wrote: > From: Clément Léger <clement.leger@bootlin.com> > > The RZ/N1 series of MPUs feature up to two Gigabit Ethernet controllers. > These controllers are based on Synopsys IPs. They can be connected to > RZ/N1 RGMII/RMII converters. > > Add a binding that describes these GMAC devices. > > Signed-off-by: "Clément Léger" <clement.leger@bootlin.com> > [rgantois: commit log] > Signed-off-by: Romain Gantois <romain.gantois@bootlin.com>
Thanks for your patch!
> --- /dev/null > +++ b/Documentation/devicetree/bindings/net/renesas,rzn1-gmac.yaml
> +examples: > + - | > + #include <dt-bindings/clock/r9a06g032-sysctrl.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + ethernet@44000000 { > + compatible = "renesas,r9a06g032-gmac", "renesas,rzn1-gmac", "snps,dwmac"; > + reg = <0x44000000 0x2000>; > + interrupt-parent = <&gic>;
There is no need to use interrupt-parent in examples.
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq", "eth_wake_irq", "eth_lpi"; > + clock-names = "stmmaceth"; > + clocks = <&sysctrl R9A06G032_HCLK_GMAC0>;
If you want this to be a real example, you should add power-domains.
> + snps,multicast-filter-bins = <256>; > + snps,perfect-filter-entries = <128>; > + tx-fifo-depth = <2048>; > + rx-fifo-depth = <4096>; > + pcs-handle = <&mii_conv1>; > + phy-mode = "mii"; > + };
Gr{oetje,eeting}s,
Geert
-- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68korg
In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
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