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SubjectRe: [PATCH V3 1/5] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings
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On 4/18/24 02:13, Bjorn Andersson wrote:
> On Wed, Apr 17, 2024 at 06:58:52PM +0530, Sibi Sankar wrote:
>> Add devicetree binding for CPUSS Control Processor (CPUCP) mailbox
>> controller.
>>
>> Reviewed-by: Rob Herring <robh@kernel.org>
>> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
>> ---
>>
>> v2:
>> * Pickup Rb from Dimitry.
>>
>> .../bindings/mailbox/qcom,cpucp-mbox.yaml | 49 +++++++++++++++++++
>> 1 file changed, 49 insertions(+)
>> create mode 100644 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>>
>> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>> new file mode 100644
>> index 000000000000..491b0a05e630
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>> @@ -0,0 +1,49 @@
>> +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/mailbox/qcom,cpucp-mbox.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Technologies, Inc. CPUCP Mailbox Controller
>> +
>> +maintainers:
>> + - Sibi Sankar <quic_sibis@qti.qualcomm.com>
>
> That doesn't look like the correct domain.

Thanks, I don't know how I even constructed this chimera of an email-id
lol.

-Sibi

>
> Regards,
> Bjorn

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