Messages in this thread | | | From | Ilpo Järvinen <> | Date | Wed, 24 Jan 2024 17:40:39 +0200 (EET) | Subject | Re: [PATCH v4 1/2] PCI: dwc: Fix a 64bit bug in dw_pcie_ep_raise_msix_irq() |
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On Wed, 24 Jan 2024, Dan Carpenter wrote:
> The "msg_addr" variable is u64. However, the "aligned_offset" is an > unsigned int. This means that when the code does: > > msg_addr &= ~aligned_offset; > > it will unintentionally zero out the high 32 bits. Use ALIGN_DOWN() > to do the alignment instead. > > Cc: stable@vger.kernel.org > Fixes: 2217fffcd63f ("PCI: dwc: endpoint: Fix dw_pcie_ep_raise_msix_irq() alignment support") > Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> > Reviewed-by: Niklas Cassel <cassel@kernel.org> > --- > v4: Add stable and r-b from Niklas > v3: Use ALIGN_DOWN() > v2: fix typo in commit message > > drivers/pci/controller/dwc/pcie-designware-ep.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c > index 5befed2dc02b..51679c6702cf 100644 > --- a/drivers/pci/controller/dwc/pcie-designware-ep.c > +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c > @@ -551,7 +551,7 @@ int dw_pcie_ep_raise_msix_irq(struct dw_pcie_ep *ep, u8 func_no, > } > > aligned_offset = msg_addr & (epc->mem->window.page_size - 1); > - msg_addr &= ~aligned_offset; > + msg_addr = ALIGN_DOWN(msg_addr, epc->mem->window.page_size); > ret = dw_pcie_ep_map_addr(epc, func_no, 0, ep->msi_mem_phys, msg_addr, > epc->mem->window.page_size); > if (ret)
Hi Dan,
You should also add the include for it:
#include <linux/align.h>
-- i.
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