Messages in this thread Patch in this message | | | From | Martin Kepplinger <> | Subject | [PATCH v1 14/14] arm64: dts: imx8mq-librem5: Add 166MHz to DDRC OPP table | Date | Thu, 9 Mar 2023 21:46:08 +0100 |
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From: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm>
This is the lowest frequency supported by older iMX8MQ SoC revisions.
Signed-off-by: Sebastian Krzyszkowiak <sebastian.krzyszkowiak@puri.sm> Signed-off-by: Martin Kepplinger <martin.kepplinger@puri.sm> --- arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi | 4 ++++ 1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi index 35bde8d41e8e7..ceced6bc4e898 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq-librem5.dtsi @@ -329,6 +329,10 @@ opp-100000000 { opp-hz = /bits/ 64 <100000000>; }; + opp-166000000 { + opp-hz = /bits/ 64 <166935483>; + }; + opp-800000000 { opp-hz = /bits/ 64 <800000000>; }; -- 2.30.2
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