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Subject[PATCH 15/19] dt-bindings: PCI: qcom: Add "mhi" register region to supported SoCs
Date
"mhi" register region contains the MHI registers that could be used by
the PCIe controller drivers to get debug information like PCIe link
transition counts on newer SoCs.

Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
---
Documentation/devicetree/bindings/pci/qcom,pcie.yaml | 12 ++++++++----
1 file changed, 8 insertions(+), 4 deletions(-)

diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
index fb32c43dd12d..2de6e7154025 100644
--- a/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/qcom,pcie.yaml
@@ -44,11 +44,11 @@ properties:

reg:
minItems: 4
- maxItems: 5
+ maxItems: 6

reg-names:
minItems: 4
- maxItems: 5
+ maxItems: 6

interrupts:
minItems: 1
@@ -185,10 +185,12 @@ allOf:
properties:
reg:
minItems: 4
- maxItems: 4
+ maxItems: 5
reg-names:
+ minItems: 4
items:
- const: parf # Qualcomm specific registers
+ - const: mhi # MHI registers
- const: dbi # DesignWare PCIe registers
- const: elbi # External local bus interface registers
- const: config # PCIe configuration space
@@ -209,10 +211,12 @@ allOf:
properties:
reg:
minItems: 5
- maxItems: 5
+ maxItems: 6
reg-names:
+ minItems: 5
items:
- const: parf # Qualcomm specific registers
+ - const: mhi # MHI registers
- const: dbi # DesignWare PCIe registers
- const: elbi # External local bus interface registers
- const: atu # ATU address space
--
2.25.1
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