| From | amergnat@baylibre ... | Date | Wed, 29 Mar 2023 10:54:37 +0200 | Subject | [PATCH v3 16/17] arm64: dts: mediatek: fix systimer properties |
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From: Amjad Ouled-Ameur <aouledameur@baylibre.com>
MT8365 has a SYST timer (System Timer), therefore the compatible node should be "mediatek,mt6765-timer" instead of "mediatek,mt6795-systimer" (which corresponds to ARM/ARM64 System Timer).
Plus, register range should be 0x100 instead of 0x10.
Finally, interrupt polarity of systimer is LEVEL_HIGH.
Fix the above properties accordingly.
Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- arch/arm64/boot/dts/mediatek/mt8365.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index c3ea3cc97a47..959d8533c24c 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -575,9 +575,9 @@ system_clk: dummy13m { }; systimer: timer@10017000 { - compatible = "mediatek,mt8365-systimer", "mediatek,mt6795-systimer"; - reg = <0 0x10017000 0 0x10>; - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_LOW>; + compatible = "mediatek,mt8365-systimer", "mediatek,mt6765-timer"; + reg = <0 0x10017000 0 0x100>; + interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; clocks = <&system_clk>; clock-names = "clk13m"; }; -- 2.25.1
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