Messages in this thread Patch in this message | | | From | Namhyung Kim <> | Subject | [PATCH] perf/x86/ibs: Set data_src.mem_lvl_num as well | Date | Fri, 10 Mar 2023 16:06:42 -0800 |
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The IBS PMU driver sets data source of memory operations but it missed mem_lvl_num field. So I'm adding them here.
Most cases are straight-forward but please check if MEM_LVLNUM_ANY_CACHE for peer cache hits is ok. Also I wonder we can add MEM_REMOTE_REMOTE for peer cache hits in a far CCX.
Signed-off-by: Namhyung Kim <namhyung@kernel.org> --- arch/x86/events/amd/ibs.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/arch/x86/events/amd/ibs.c b/arch/x86/events/amd/ibs.c index 64582954b5f6..819869fc2dc7 100644 --- a/arch/x86/events/amd/ibs.c +++ b/arch/x86/events/amd/ibs.c @@ -724,6 +724,7 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, /* L1 Hit */ if (op_data3->dc_miss == 0) { data_src->mem_lvl = PERF_MEM_LVL_L1 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_L1; return; } @@ -733,6 +734,7 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, if (boot_cpu_data.x86 != 0x19 || boot_cpu_data.x86_model > 0xF || !(op_data3->sw_pf || op_data3->dc_miss_no_mab_alloc)) { data_src->mem_lvl = PERF_MEM_LVL_L2 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_L2; return; } } @@ -748,12 +750,14 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, if (ibs_caps & IBS_CAPS_ZEN4) { if (ibs_data_src == IBS_DATA_SRC_EXT_LOC_CACHE) { data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_L3; return; } } else { if (ibs_data_src == IBS_DATA_SRC_LOC_CACHE) { data_src->mem_lvl = PERF_MEM_LVL_L3 | PERF_MEM_LVL_REM_CCE1 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_L3; return; } } @@ -762,6 +766,7 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, if (ibs_caps & IBS_CAPS_ZEN4 && ibs_data_src == IBS_DATA_SRC_EXT_NEAR_CCX_CACHE) { data_src->mem_lvl = PERF_MEM_LVL_REM_CCE1 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_ANY_CACHE; return; } @@ -769,11 +774,13 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, if (ibs_caps & IBS_CAPS_ZEN4) { if (ibs_data_src == IBS_DATA_SRC_EXT_FAR_CCX_CACHE) { data_src->mem_lvl = PERF_MEM_LVL_REM_CCE2 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_ANY_CACHE; return; } } else { if (ibs_data_src == IBS_DATA_SRC_REM_CACHE) { data_src->mem_lvl = PERF_MEM_LVL_REM_CCE2 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_ANY_CACHE; return; } } @@ -784,6 +791,7 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, data_src->mem_lvl = PERF_MEM_LVL_LOC_RAM | PERF_MEM_LVL_HIT; else data_src->mem_lvl = PERF_MEM_LVL_REM_RAM1 | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_RAM; return; } @@ -832,10 +840,12 @@ static void perf_ibs_get_mem_lvl(union ibs_op_data2 *op_data2, */ if (op_data3->dc_miss_no_mab_alloc) { data_src->mem_lvl = PERF_MEM_LVL_LFB | PERF_MEM_LVL_HIT; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_LFB; return; } data_src->mem_lvl = PERF_MEM_LVL_NA; + data_src->mem_lvl_num = PERF_MEM_LVLNUM_NA; } static bool perf_ibs_cache_hit_st_valid(void) -- 2.40.0.rc1.284.g88254d51c5-goog
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