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Subject[PATCH] PCI: mediatek-gen3: fix PCIe #PERST being de-asserted too early
The driver for MediaTek gen3 PCIe hosts de-asserts all reset
signals at the same time using a single register write operation.
Delay the de-assertion of the #PERST signal by 100ms as required by
PCIe CEM clause 2.2, some PCIe devices fail to come up otherwise.

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/pci/controller/pcie-mediatek-gen3.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/pci/controller/pcie-mediatek-gen3.c b/drivers/pci/controller/pcie-mediatek-gen3.c
index e0e27645fdf4..ba8cfce03aad 100644
--- a/drivers/pci/controller/pcie-mediatek-gen3.c
+++ b/drivers/pci/controller/pcie-mediatek-gen3.c
@@ -350,7 +350,13 @@ static int mtk_pcie_startup_port(struct mtk_gen3_pcie *pcie)
msleep(100);

/* De-assert reset signals */
- val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB | PCIE_PE_RSTB);
+ val &= ~(PCIE_MAC_RSTB | PCIE_PHY_RSTB | PCIE_BRG_RSTB);
+ writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);
+
+ msleep(100);
+
+ /* De-assert PERST# signals */
+ val &= ~(PCIE_PE_RSTB);
writel_relaxed(val, pcie->base + PCIE_RST_CTRL_REG);

/* Check if the link is up or not */
--
2.42.0
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