Messages in this thread | | | Date | Tue, 1 Sep 2020 05:07:48 +0800 | From | kernel test robot <> | Subject | drivers/pci/controller/pci-ftpci100.c:37: warning: "PCI_IOSIZE" redefined |
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tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git master head: f75aef392f869018f78cfedf3c320a6b3fcfda6b commit: 482cd90cd781c9b5607ed9c9f8641dc95a9d4cce MIPS: Loongson64: Define PCI_IOBASE date: 3 months ago config: mips-randconfig-p002-20200831 (attached as .config) compiler: mips64el-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross git checkout 482cd90cd781c9b5607ed9c9f8641dc95a9d4cce # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=mips
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot <lkp@intel.com>
All warnings (new ones prefixed by >>):
>> drivers/pci/controller/pci-ftpci100.c:37: warning: "PCI_IOSIZE" redefined 37 | #define PCI_IOSIZE 0x00 | In file included from arch/mips/include/asm/addrspace.h:13, from arch/mips/include/asm/barrier.h:11, from include/linux/compiler.h:256, from include/linux/init.h:5, from drivers/pci/controller/pci-ftpci100.c:14: arch/mips/include/asm/mach-loongson64/spaces.h:11: note: this is the location of the previous definition 11 | #define PCI_IOSIZE SZ_16M |
# https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=482cd90cd781c9b5607ed9c9f8641dc95a9d4cce git remote add linus https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git git fetch --no-tags linus master git checkout 482cd90cd781c9b5607ed9c9f8641dc95a9d4cce vim +/PCI_IOSIZE +37 drivers/pci/controller/pci-ftpci100.c
9e2aee80c78d50 drivers/pci/host/pci-ftpci100.c Rob Herring 2018-05-11 32 d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 33 /* d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 34 * Special configuration registers directly in the first few words d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 35 * in I/O space. d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 36 */ d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 @37 #define PCI_IOSIZE 0x00 d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 38 #define PCI_PROT 0x04 /* AHB protection */ d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 39 #define PCI_CTRL 0x08 /* PCI control signal */ d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 40 #define PCI_SOFTRST 0x10 /* Soft reset counter and response error enable */ d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 41 #define PCI_CONFIG 0x28 /* PCI configuration command register */ d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 42 #define PCI_DATA 0x2C d3c68e0a7e34af drivers/pci/host/pci-ftpci100.c Linus Walleij 2017-03-12 43
:::::: The code at line 37 was first introduced by commit :::::: d3c68e0a7e34af2b86f5408c4d6e794a38bbd9e1 PCI: faraday: Add Faraday Technology FTPCI100 PCI Host Bridge driver
:::::: TO: Linus Walleij <linus.walleij@linaro.org> :::::: CC: Bjorn Helgaas <bhelgaas@google.com>
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