Messages in this thread Patch in this message | | | From | Imre Palik <> | Subject | [PATCH v3] perf: honoring the architectural performance monitoring version | Date | Mon, 15 Jun 2015 16:22:32 +0200 |
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From: "Palik, Imre" <imrep@amazon.de>
Architectural performance monitoring version 1 doesn't support fixed counters. Currently, even if a hypervisor advertises support for architectural performance monitoring version 1, perf may still tries to use the fixed counters, as the constraints are set up based on the CPU model.
This patch ensures that perf honors the architectural performance monitoring version returned by CPUID, and it only uses the fixed counters for version two and above.
Some of the ideas in this patch are coming from Peter Zijlstra.
Signed-off-by: Imre Palik <imrep@amazon.de> Cc: Anthony Liguori <aliguori@amazon.com> --- arch/x86/kernel/cpu/perf_event_intel.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c index a1e35c9..c54bb97 100644 --- a/arch/x86/kernel/cpu/perf_event_intel.c +++ b/arch/x86/kernel/cpu/perf_event_intel.c @@ -3322,13 +3322,14 @@ __init int intel_pmu_init(void) * counter, so do not extend mask to generic counters */ for_each_event_constraint(c, x86_pmu.event_constraints) { - if (c->cmask != FIXED_EVENT_FLAGS - || c->idxmsk64 == INTEL_PMC_MSK_FIXED_REF_CYCLES) { - continue; + if (c->cmask == FIXED_EVENT_FLAGS + && c->idxmsk64 != INTEL_PMC_MSK_FIXED_REF_CYCLES) { + c->idxmsk64 |= + (1ULL << x86_pmu.num_counters) - 1; } - - c->idxmsk64 |= (1ULL << x86_pmu.num_counters) - 1; - c->weight += x86_pmu.num_counters; + c->idxmsk64 &= + ~(~0UL << (INTEL_PMC_IDX_FIXED + x86_pmu.num_counters_fixed)); + c->weight = hweight64(c->idxmsk64); } } -- 1.7.9.5
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