lkml.org 
[lkml]   [2010]   [Jun]   [22]   [last100]   RSS Feed
Views: [wrap][no wrap]   [headers]  [forward] 
 
Messages in this thread
/
Date
From
SubjectRe: intel_cacheinfo: potential NULL dereference?
On 06/22/2010 01:18 PM, Jiri Slaby wrote:
> Hi,
>
> commit 9350f982 changed the code so it looks like:
> static ssize_t store_cache_disable(struct _cpuid4_info *this_leaf,
> const char *buf, size_t count,
> unsigned int slot)
> {
> struct pci_dev *dev = this_leaf->l3->dev; <<1>>
> int cpu = cpumask_first(to_cpumask(this_leaf->shared_cpu_map));
> unsigned long val = 0;
>
> #define SUBCACHE_MASK (3UL << 20)
> #define SUBCACHE_INDEX 0xfff
>
> if (!this_leaf->l3 || !this_leaf->l3->can_disable) <<2>>
> return -EINVAL;
>
> Stanse found, that this_leaf->l3 is dereferenced at <<1>>, but checked
> for being NULL at <<2>>. Is the check superfluous or the dev assignment
> should go after the check?

Oh, and I have another report with same symptoms for show_cache_disable.

--
js


\
 
 \ /
  Last update: 2010-06-22 13:23    [W:0.327 / U:0.060 seconds]
©2003-2020 Jasper Spaans|hosted at Digital Ocean and TransIP|Read the blog|Advertise on this site