Messages in this thread | | | Date | Tue, 22 Jun 2010 16:11:04 +0200 | From | Jiri Slaby <> | Subject | Re: intel_cacheinfo: potential NULL dereference? |
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On 06/22/2010 03:08 PM, Borislav Petkov wrote: > From: Jiri Slaby <jirislaby@gmail.com> > Date: Tue, Jun 22, 2010 at 07:20:14AM -0400 > >> On 06/22/2010 01:18 PM, Jiri Slaby wrote: >>> Stanse found, that this_leaf->l3 is dereferenced at <<1>>, but checked >>> for being NULL at <<2>>. Is the check superfluous or the dev assignment >>> should go after the check? >> >> Oh, and I have another report with same symptoms for show_cache_disable. > > Right, so I have a patch in tip/x86/cpu > (8cc1176e5de534d55cb26ff0cef3fd0d6ad8c3c0) which reorganizes > and cleans up that code. With it, all possible checks land in > amd_check_l3_disable() and if they have all been passed, the PCI dev is > guaranteed to be properly set. So no need for sprinkling additional NULL > checks in the code. > > How's that?
Looks good.
thanks, -- js
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