Messages in this thread Patch in this message | | | Date | Fri, 15 May 2009 08:43:48 GMT | From | tip-bot for Ingo Molnar <> | Subject | [tip:perfcounters/core] perf_counter: x86: Disallow interval of 1 |
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Commit-ID: 1c80f4b598d9b075a2a0be694e28be93a6702bcc Gitweb: http://git.kernel.org/tip/1c80f4b598d9b075a2a0be694e28be93a6702bcc Author: Ingo Molnar <mingo@elte.hu> AuthorDate: Fri, 15 May 2009 08:25:22 +0200 Committer: Ingo Molnar <mingo@elte.hu> CommitDate: Fri, 15 May 2009 09:47:05 +0200
perf_counter: x86: Disallow interval of 1
On certain CPUs i have observed a stuck PMU if interval was set to 1 and NMIs were used. The PMU had PMC0 set in MSR_CORE_PERF_GLOBAL_STATUS, but it was not possible to ack it via MSR_CORE_PERF_GLOBAL_OVF_CTRL, and the NMI loop got stuck infinitely.
[ Impact: fix rare hangs during high perfcounter load ]
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Paul Mackerras <paulus@samba.org> Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com> LKML-Reference: <new-submission> Signed-off-by: Ingo Molnar <mingo@elte.hu>
--- arch/x86/kernel/cpu/perf_counter.c | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_counter.c b/arch/x86/kernel/cpu/perf_counter.c index 1dcf670..46a82d1 100644 --- a/arch/x86/kernel/cpu/perf_counter.c +++ b/arch/x86/kernel/cpu/perf_counter.c @@ -473,6 +473,11 @@ x86_perf_counter_set_period(struct perf_counter *counter, left += period; atomic64_set(&hwc->period_left, left); } + /* + * Quirk: certain CPUs dont like it if just 1 event is left: + */ + if (unlikely(left < 2)) + left = 2; per_cpu(prev_left[idx], smp_processor_id()) = left;
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