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    Subject[RFC Patch] use MTRR for write combining if PAT is not available

    I've found a problem with not setting up MTRR for the framebuffer
    memory. After I investigated I think this is not a problem, but a kernel
    issue. uses libpciaccess to map the framebuffer memory. This library opens
    /sys/bus/pci/devices/*/resource0_wc and mmaps the memory. Unfortunately, the
    kernel only enables write combining if PAT is enabled, if it is not, the
    memory is mmapped uncached. But Xorg (respectively libpciaccess) thinks it was
    successfully mapped with write combining enabled and thus does not
    additionally set up MTRR entries.

    The corresponding libpciaccess code can be found here:

    If the kernel behavior is intentional and should always set up MTRR
    entries, why should it use /sys/.../resource0_wc at all? I think there are 2
    possibilities to make the kernel behavior consistent:

    1. The mmap_wc should fail if PAT is not enabled.
    (libpciaccess will then map the framebuffer uncached and set up
    MTRR entries)
    2. Use MTRR to enable write combining if PAT is not available.

    In an earlier thread about ioremap_wc, Arjan van de Ven wrote that option 2 is
    preferred over option 1:

    So, I've created the attached patch implementing option 2. For me this solves
    the problem with the slow Video playback due to not correctly set up MTRR

    Kind regards,
    Thomas Schlichter
    From 19fb39061825a0110d1a4feb3f83dfa3f09fb738 Mon Sep 17 00:00:00 2001
    From: Thomas Schlichter <>
    Date: Thu, 8 Oct 2009 21:24:07 +0200
    Subject: [PATCH] Use MTRR for write combining mmap/ioremap if PAT is not available uses libpciaccess which tries to mmap with write combining enabled via
    /sys/bus/pci/devices/*/resource0_wc. Currently, when PAT is not enabled, we
    fall back to uncached mmap. Then libpciaccess thinks it succeeded mapping
    with write combining anabled and does not set up suited MTRR entries. ;-(

    So when falling back to uncached mapping, we better try to set up MTRR
    entries automatically. To match this modified PCI mmap behavior, also
    ioremap_wc and set_memory_wc are adjusted.

    Signed-off-by: Thomas Schlichter <>
    arch/x86/mm/ioremap.c | 14 +++++++++-----
    arch/x86/mm/pageattr.c | 10 ++++++++--
    arch/x86/pci/i386.c | 6 ++++++
    3 files changed, 23 insertions(+), 7 deletions(-)

    diff --git a/arch/x86/mm/ioremap.c b/arch/x86/mm/ioremap.c
    index 334e63c..1a73bbc 100644
    --- a/arch/x86/mm/ioremap.c
    +++ b/arch/x86/mm/ioremap.c
    @@ -21,6 +21,7 @@
    #include <asm/tlbflush.h>
    #include <asm/pgalloc.h>
    #include <asm/pat.h>
    +#include <asm/mtrr.h>

    #include "physaddr.h"

    @@ -268,11 +269,14 @@ EXPORT_SYMBOL(ioremap_nocache);
    void __iomem *ioremap_wc(resource_size_t phys_addr, unsigned long size)
    - if (pat_enabled)
    - return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
    - __builtin_return_address(0));
    - else
    - return ioremap_nocache(phys_addr, size);
    + if (!pat_enabled) {
    + void __iomem *ret = ioremap_nocache(phys_addr, size);
    + if (ret)
    + mtrr_add(phys_addr, size, MTRR_TYPE_WRCOMB, false);
    + return ret;
    + }
    + return __ioremap_caller(phys_addr, size, _PAGE_CACHE_WC,
    + __builtin_return_address(0));

    diff --git a/arch/x86/mm/pageattr.c b/arch/x86/mm/pageattr.c
    index dd38bfb..7f3a85b 100644
    --- a/arch/x86/mm/pageattr.c
    +++ b/arch/x86/mm/pageattr.c
    @@ -23,6 +23,7 @@
    #include <asm/pgalloc.h>
    #include <asm/proto.h>
    #include <asm/pat.h>
    +#include <asm/mtrr.h>

    * The current flushing context - we pass it instead of 5 arguments:
    @@ -1010,8 +1011,13 @@ int set_memory_wc(unsigned long addr, int numpages)
    int ret;

    - if (!pat_enabled)
    - return set_memory_uc(addr, numpages);
    + if (!pat_enabled) {
    + ret = set_memory_uc(addr, numpages);
    + if (!ret)
    + mtrr_add(__pa(addr), numpages * PAGE_SIZE,
    + MTRR_TYPE_WRCOMB, false);
    + return ret;
    + }

    ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
    diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c
    index b22d13b..06cf678 100644
    --- a/arch/x86/pci/i386.c
    +++ b/arch/x86/pci/i386.c
    @@ -33,6 +33,7 @@
    #include <linux/bootmem.h>

    #include <asm/pat.h>
    +#include <asm/mtrr.h>
    #include <asm/e820.h>
    #include <asm/pci_x86.h>
    #include <asm/io_apic.h>
    @@ -301,5 +302,10 @@ int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,

    vma->vm_ops = &pci_mmap_ops;

    + if (!pat_enabled && write_combine)
    + mtrr_add_page(vma->vm_pgoff,
    + (vma->vm_end - vma->vm_start) >> PAGE_SHIFT,
    + MTRR_TYPE_WRCOMB, false);
    return 0;
     \ /
      Last update: 2009-10-10 03:37    [W:0.049 / U:10.600 seconds]
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