Messages in this thread | | | Subject | Re: Page fault scalability patch V18: Drop first acquisition of ptl | From | Benjamin Herrenschmidt <> | Date | Thu, 03 Mar 2005 17:30:28 +1100 |
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On Fri, 2005-03-04 at 04:19 +1100, Nick Piggin wrote:
> You don't want to do that for all architectures, as I said earlier. > eg. i386 can concurrently set the dirty bit with the MMU (which won't > honour the lock). > > So you then need an atomic lock, atomic pte operations, and atomic > unlock where previously you had only the atomic pte operation. This is > disastrous for performance.
Of course, but I was answering to David about sparc64 which uses software TLB load :)
Ben.
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