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SubjectRe: [ACPI] Re: [RFC] Reliable video POSTing on resume
Date
Am Samstag, 5. Februar 2005 16:47 schrieb Jon Smirl:
> On Sat, 05 Feb 2005 12:53:37 +0100, Ondrej Zary
>
> <linux@rainbow-software.org> wrote:
> > I wonder how this can work:
> > a motherboard with i815 chipset (integrated VGA), Video BIOS is
> > integrated into system BIOS
> > a PCI card inserted into one of the PCI slots, configured as primary in
> > system BIOS
>
> The info needed to initialize Intel chips is public. The info needed
> to initialize most Nvidia and ATI chips is not.
DID someone ask ATI or Nvidia for this? I have the impression that everyone
says ati doesn't help, but no one tried to get help so far.

The reset code of radeon card seems to be easy to reverse engineer. I have
started an attempt and I have 50-60% of my radeon M9 reset code implemented
in a 32 bit C program. I had to stop due to school reasons.

My radeonreset kernel module turns the backlight off and seems to reset the
card's memory. I consider it dangerous because I don't know what it really
does because I don't have the card's specs. A owner of an radeon M6 card
tried my code too and it worked in the same way as on my M9 card, so I think
the reset procedure is the same on all radeon cards. I think with some
comparison of the reset code and the specs that the DRI/X.org/XFree
developers have we can write a working reset code for radeon cards.
This won't help users of non-radeon cards of course :-(

ATI is aware of suspend/resume problems with their fglrx driver(see
http://www.ati.com/support/infobase/4746.html). I've written a few notes to
them, but I haven't got a reply so far(But they also told me not to expect
one). The power management code in radeon_pm.c seems to be written by ATI.
Alltogether I'd not call the situation hopeless.

Cheers,
Stefan
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